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The ONLY source for quarterly EDA revenue data
The Market Statistics Service (MSS) is:
Detailed - by application segments, geographic regions and platforms
Timely - published quarterly
90 days after quarter close
Reliable - confidential data reported directly to an accounting firm
Use the Market Statistics Service (MSS) to:
Determine your market share
Track industry trends Develop
business forecasts Measure
market growth
2007 Subscriptions are Due: June 30, 2007
Sample Data | EDA Categories
| IP Categories | Confidentiality
| To Order | |
| | | |
| | EDA
& IP Quarterly Revenue, 1996 - 2005 
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| | Top | |
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EDA Product
Categories for 2006
MSS
tracks revenue in the following EDA product categories.
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| 1.0 | Services | |
| 1.1 | Design
Services Consulting | |
| | 1.1.1 | Board/System
Design Service Consulting | |
| | 1.1.2 | Semiconductor
Design Service Consulting | |
| 1.2 | Custom
Tool Development & Design Environments and Product Data Management (PDM) &
Component Information Systems (CIS) Services Training Services | |
| 1.3 | Training
Services | |
| 1.4 | Design
Flow & Methodology Development | |
| 1.5 | Other
Services | |
| 2.0 | Computer-Aided
Engineering (CAE) Tools | | | 2.1 | System-Level
Design & Verification Tools | |
| | 2.1.1 | System-Level
Design | |
| | 2.1.2 | System-Level
Verification | |
| 2.2 | Design
Entry Tools (Textual and Graphical) | |
| | 2.2.1 | HDL
and Graphical Design Entry Tools | |
| | 2.2.2 | Schematic
Entry Tools | |
| | | 2.2.2.1 | IC
Schematic Entry Tools | |
| | | 2.2.2.2 | PCB
Schematic Entry Tools | |
| 2.3 | Logic
Verification | |
| | 2.3.1 | RTL
Simulation | |
| | 2.3.2 | Auxillary
RTL Simulation Tools | |
| | | 2.3.3 | Static
Verification Tools | | | | | 2.3.4
| Hardware-Assisted VerificationAnalog
& Mixed-Signal Simulators | |
| | 2.3.5
| Other Logic Verification
and Simulation Tools | |
| 2.4 | Analog
& Mixed-Signal Simulators | |
| | 2.4.1 | Analog
Simulators | |
| | 2.4.2 | Mixed-Signal
Simulators | |
| 2.5 | Formal
and Functional Verification Tools | |
| | 2.5.1 | Equivalent
Checking | |
| | 2.5.2 | Property
Checking | |
| 2.6 | Analysis
Tools | |
| | 2.6.1 | IC/ASIC
Static Timing Analysis Tools | |
| | 2.6.2 | IC/ASIC
Signal Integrity Analysis Tools | |
| | 2.6.3 | IC/ASIC
Power Analysis and Optimization Tools | |
| | 2.6.4 | IC/ASIC
Transistor-Level Simulation & Analysis Tools | |
| | 2.6.5 | Analog
and High-Frequency Analysis Tools | |
| | | 2.6.6 | PCB
Analysis | | | | 2.6.7 | IC
Package Analysis | |
| | 2.7 | Other
System Interconnect Analysis | |
| | 2.8 | Other
IC-Related Analysis | |
| 2.9 | Design-for-Test
and Test Automation Tools | |
| | 2.9.1 | ATPG | |
| | 2.9.2 | BIST | |
| | | 2.9.2.1 | Memory
| |
| | | 2.9.2.2 | Logic | |
| | 2.9.3 | Scan | |
| | | 2.9.3.1 | Internal | |
| | | 2.9.3.2 | Boundary | |
| | 2.9.4 | Fault
Simulation and Other Test | |
| 2.10 | Synthesis
Tools | |
| 2.11 | Other
CAE Hardware & Software | |
| 3.0 | PCB
& MCM Layout Tools | | | 3.1 | PCB
Physical Design | |
| 3.2 | IC
PackagePhysical Design | |
| | 3.3 | Other
Physical Design | | | 3.4 | Library
& Design Data Management | |
| 4.0 | IC
Physical Design & Verification Tools | |
| 4.1 | IC/ASIC
Automatic Placement & Routing Tools | |
| 4.2 | IC/ASIC
Design Planning & Floorplanning Tools | |
| 4.3 | IC
Full-Custom Layout Tools | |
| 4.4 | IC
Layout Verification Tools | |
| 4.5 | Parasitic
Extraction Tools | |
| 4.6. | RET
EDA (Including OPC and PSM) | |
| 4.7 | Technology
CAD (TCAD) | |
| 4.8 | Mask
Data Prep | | | | 4.9 | Yield
Enhancement | | | 4.10 | Other
IC/ASIC and FPGA Physical Design & Verification Tools | |
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| | Top | |
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IP Product Categories for 2006 The
IP categories tracked by MSS were created in partnership with VSI
Alliance. The quarterly
report aligns its IP category breakdowns to match the official VSIA taxonomy for
IP, which has become the industry standard for IP classification. | |
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| 5.0 | Semiconductor
Intellectual Property (IP) | |
| 5.1 | IP-Related
Tools | |
| | 5.1.1 | Module
Generators | |
| | 5.1.2
| Development Tools for
Module Generators | |
| | 5.1.3
| IP Creation and Packaging
Tools | |
| | 5.1.4
| IP Management Tools | |
| | 5.1.5
| Royalty-Based IP Tools | |
| 5.2 | Macrocells
and Cores | |
| | 5.2.1 | Physical
Libraries | |
| | 5.2.2 | Memory
Elements | |
| | 5.2.3 | Non-Volatile
Memory Elements | |
| | 5.2.4 | Analog
and Mixed Signal Cores | |
| | | 5.2.4.1 | RF
Cores | |
| | | 5.2.4.2 | Components | |
| | | 5.2.4.3 | Signal
Processing Cores | |
| | 5.2.5 | Arithmetic,
Mathematic, and Logic Functional Blocks | |
| | 5.2.6 | Interface/Peripheral
Cores | |
| | | 5.2.6.1 | xDSL
Cores | |
| | | 5.2.6.2 | PCI
Controller Cores | |
| | | | 5.2.6.2.1 | PCI
Controller cores (soft RTL /firm/hard) | |
| | | | 5.2.6.2.2 | PCI
Controller PHY | |
| | | 5.2.6.3 | USB
Controller Cores | |
| | | | 5.2.6.3.1 | USB
Controller cores (soft RTL /firm/hard) | |
| | | | 5.2.6.3.2 | USB
Controller PHY | |
| | | 5.2.6.4 | PCMCIA | |
| | | 5.2.6.5 | IEEE
1284 | |
| | | 5.2.6.6 | IEEE
1394 | |
| | | 5.2.6.7 | SONET | |
| | | 5.2.6.8 | Ethernet
(IEEE802.x) Controller Cores | |
| | | | 5.2.6.8.1 | Ethernet
Controller Cores (soft RTL /firm/hard) | |
| | | | 5.2.6.8.2 | Ethernet
Controller PHY | |
| | | 5.2.6.9 | Bluetooth | |
| | | 5.2.6.10 | Rapid
I/O | |
| | | 5.2.6.11 | Infiniband | |
| | | 5.2.6.12 | Fiberchannel | |
| | | 5.2.6.13 | SPI-4 | |
| | | 5.2.6.14 | Other
Interface/Peripheral Cores | |
| | 5.2.7 | CODEC/Encryption
Cores | |
| | | 5.2.7.1 | Encoders/Decoders | |
| | | | 5.2.7.1.1 | MPEGx | |
| | | | 5.2.7.1.2 | Viterbi | |
| | | | 5.2.7.1.3 | Reed-Solomon | |
| | | | 5.2.7.1.4 | Turbo-Coding | |
| | | | 5.2.7.1.5 | Other
Encoders/Decoders | |
| | | 5.2.7.2 | Encryption/Decryption
Cores | |
| | | 5.2.7.3 | Modulators/Demodulators | |
| | | 5.2.7.4 | Other
CODEC/Encryption Cores (Error Correction/Detection) | |
| | 5.2.8 | Graphics,
Imaging & Audio | |
| | 5.2.9 | Processor
Cores | |
| | | 5.2.9.1 | Controller
Cores | |
| | | 5.2.9.2 | MCU
/ MPU Cores | |
| | | 5.2.9.3 | DSP
Processor Cores | |
| | | 5.2.9.4 | Other
Processor Cores | |
| | 5.2.10 | Subsystems | |
| | 5.2.11 | Test
Functions | |
| | 5.2.12 | DSP
Functions | |
| | 5.2.13 | Other
Macrocells & Cores | |
| 5.3 | Verification
IP | | | | 5.3.1 | Interface/Peripheral
Cores | |
| | 5.3.2 | CODEC/Encryption | |
| | 5.3.3 | Graphics,
Imaging & Audio | |
| | 5.3.4 | Processors | |
| | 5.3.5 | Other
Verification IP | |
| 5.4 | Embedded
Software | |
| | 5.4.1 | Real-Time
Operating Systems | |
| | 5.4.2 | Stacks
& Drivers | |
| | 5.4.3 | Application
Software | |
| | 5.4.4 | Other
Embedded Software | |
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| | Reporting
Confidentiality Reporting
Companies Each report contains a list by application
segment of companies that report data. Confidential Data Collection
Company revenue data is collected by the accounting firm PricewaterhouseCoopers
for the EDA Consortium. Strict confidentiality of the individual company data
is maintained, as follows: - A
market segment is reported only if four or more companies have submitted data
for that segment. If three companies have reported on a segment, those companies
must provide unanimous permission for the segment to be broken out.
Subscribe
to Market Statistics Service (MSS) Receive
your quarterly Market Statistics Service report by mailing or faxing us your subscription
form.
For
assistance or answers to your MSS questions, call 408-287-EDAC (3322) or email the EDA Consortium. | |
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