You
and your East Coast colleagues are invited to attend our
EDA Consortium East Coast Meeting:
What Customers Want for Hardware-Software
Co-Design Tools
Thursday,
May 10, 2007, 6:00 p.m., Chelmsford, MA |
Senior engineering
managers, consultants, and technical leaders will present their current methodologies
and suggest ideas for improvement of hardware-software co-design tools to help
them address upcoming challenges. Brief presentations will be followed by discussion.
| Moderator:
Rich McAndrew, President of Siliance,
Inc., moderating a panel of senior engineers and engineering managers currently
involved in hardware/software co-design. Panel:
Bob Supnik, VP of Engineering, SiCortex: Developing
high performance/low power multiprocessor chip set
Vlad Kheyfets, Principal
Engineer, Teradyne: SystemC modeling architect
Sreeni Rao, Senior Manager, Analog Devices: Specializes in chip level
and software integration for complex chips for hand-held devices and cell phones
Ian Kersley, President of IPK Consulting: SystemC Expert |
DATE
Thursday, May 10, 2007
6:00 PM - Reception
7:00 PM - Panel
LOCATION
Cadence Design Systems
270 Billerica Road
Chelmsford, MA 01824
Register
Now
All
EDA & IP executives, stakeholders & press are welcome to join us.
There
is no charge for this event. | Sponsors
  
Contributing
Sponsor
Kaliday
Marketing – Marketing for Results |
EDA
Consortium Promotional Emailing, 111 West Saint John Street, Suite 220, San Jose,
CA 95113
Phone: (408) 287-3322 * Unsubscribe to: karla@edac.org |
|
